Honors Theses

Advisor

Swapnajit Chakravarty, Ph.D.

Department

Electro-Optics and Photonics

Publication Date

4-23-2025

Document Type

Honors Thesis

Abstract

In recent years, with the advent of mature miniature semiconductor fabrication processes, the photonic integrated circuit (PIC) has emerged as a potential solution for the increased power consumption and bandwidth of conventional electronic computing technologies. As low-energy, optical devices, PICs serve to bring the solutions and advantages of optical technologies down to the form-factor of typical electronic microchips, including applications in telecommunications, high-speed computing, sensing, and quantum computing. However, despite the existing technologies for semiconductor fabrication, PICs, unlike their electronic counterparts, are exceedingly difficult to package and test, with each part of the process individually taking up roughly 30% of the manufacturing cost. Thus, in recent years, much focus has been placed on reducing these costs through increased automation of the various testing processes, particularly the fiber alignment process, in which, for a given device, the input and output fibers are moved to the optimal position for maximum throughput. The following paper describes the construction and implementation of an automated PIC measurement system in the Silicon Photonics Lab at the University of Dayton, including implementations of automated fiber alignment routines. The system competes with state-of-the-art output metrics in terms of measurement throughput and includes components for both optical and electric device measurement.

Permission Statement

This item is protected by copyright law (Title 17, U.S. Code) and may only be used for noncommercial, educational, and scholarly purposes.

Keywords

Undergraduate research

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