FPGA based high throughput low power multi-core neuromorphic processor
Date of Award
2015
Degree Name
M.S. in Electrical Engineering
Department
Department of Electrical and Computer Engineering
Advisor/Chair
Advisor: Tarek Taha
Abstract
The interest in specialized neuromorphic computing architectures has been increasing recently, and several applications have been shown to be capable of being accelerated on such platforms. This thesis describes the implementation of multicore digital neuromorphic processing systems on FPGAs. Static and Dynamic routing were used to allow communication between the cores on the FPGA. Several applications were mapped to the system including image edge detection, MNIST image classification, and biometric ECG classification. Given that all the applications were implemented on the same processor (hence same base Verilog code), with only a change in the synaptic weights and number of neurons utilized, the system has the capability to accelerate a broad range of applications.
Keywords
Neuromorphics, Neural networks (Computer science), Adaptive routing (Computer network management), Field programmable gate arrays, Electrical Engineering, Computer Engineering, FPGA, Neural Network, Static Routing, Dynamic Routing, Low Power, High Throughput
Rights Statement
Copyright © 2015, author
Recommended Citation
Qi, Yangjie, "FPGA based high throughput low power multi-core neuromorphic processor" (2015). Graduate Theses and Dissertations. 1070.
https://ecommons.udayton.edu/graduate_theses/1070
