Date of Award
2006
Degree Name
M.S. in Electrical Engineering
Department
Department of Electrical and Computer Engineering
Keywords
Data compression (Computer science), VHDL (Computer hardware description language), Computer algorithms
Rights Statement
Copyright © 2006, author
Recommended Citation
Hohler, Andréa, "Design of a stack-run encoder and decoder as a VHDL IP core" (2006). Graduate Theses and Dissertations. 3345.
https://ecommons.udayton.edu/graduate_theses/3345
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