Optimum microarchitectures for neuromorphic algorithms

Date of Award

2011

Degree Name

M.S. in Electrical Engineering

Department

Department of Electrical and Computer Engineering

Advisor/Chair

Advisor: Tarek M. Taha

Abstract

At present there is a strong interest in the research community to develop large scale implementations of neuromorphic algorithms. These systems consume significant amounts of power, area, and are very expensive to build. This thesis examines the design space of multicore processors for accelerating neuromorphic algorithms. A new multicore chip will enable more efficient design of large scale neuromorphic computing systems. The algorithms examined in this thesis are the HMAX and Izhikevich models. HMAX was developed recently at MIT to model the visual system of the human brain. The Izhikevich model was presented by Izhikevich as a biologically accurate spiking neuron model. This thesis also examines the parallelization of the HMAX model for studying multicore architectures. The results show the best single core architectures for HMAX and Izhikevich are almost same, though HMAX needs more cache. The multicore study shows that the off chip memory bus width and physical memory latency could improve the performance of the multicore system.

Keywords

Integrated circuits Very large scale integration Design and construction, Neural networks (Computer science) Design and construction

Rights Statement

Copyright © 2011, author

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