Implementation of a single channel automatic identification system (AIS) on a field programmable gate array (FPGA)
Date of Award
2013
Degree Name
M.S. in Electrical Engineering
Department
Department of Electrical and Computer Engineering
Advisor/Chair
Advisor: Monish Ranjan Chatterjee
Abstract
Automatic Identification System (AIS) plays an important role to track maritime vessels. In a world of Somali pirates hijacking maritime vessels and U.S. Navy destroyers slamming into Supertankers, AIS is an inexpensive low power wireless communication sensor solution used to identify and exchange information (GPS, heading, speed, etc.) with other maritime vessels. This research project is an implementation of a single channel Automatic Identification System (AIS) on a Field Programmable Gate Array (FPGA) chip used on common military signal intelligence systems. Unlike conventional AIS receivers, the design uses commonly existing components that are found in military signal intelligence systems. The AIS receiver algorithms developed in this project can successfully detect the AIS signal, demodulate the Gaussian Minimum Shift Keying (GMSK) modulation, decode, and encode the messages in National Marine iv Electronics Association (NMEA 0813) standard format to be compatible with other maritime equipment.
Keywords
Ships Automatic identification systems, Field programmable gate arrays, Electronic surveillance, Computer engineering; electrical engineering; engineering; automatic identification system; AIS
Rights Statement
Copyright © 2013, author
Recommended Citation
Patel, Pranav Ramesh, "Implementation of a single channel automatic identification system (AIS) on a field programmable gate array (FPGA)" (2013). Graduate Theses and Dissertations. 615.
https://ecommons.udayton.edu/graduate_theses/615
