An FPGA Implementation of Large-Scale Image Orthorectification
Date of Award
2018
Degree Name
M.S. in Electrical Engineering
Department
Department of Electrical Engineering
Advisor/Chair
Advisor: Eric Balster
Abstract
This thesis presents a hardware implementation of an image orthorectification process using back-projection. Image orthorectification is integral to effective analysis and exploitation of aerial imagery and is often one of the largest processing bottlenecks. As imaging sensors grow in pixel count and associated target footprint, the image orthorectification process requires an associated increase in compute capability. In order to support size, weight, and power (SWaP) constrained processing environments, such as on-board systems for unmanned aerial vehicles (UAVs), efficient and scalable solutions must be developed. Moreover, in surveillance applications minimizing latency is paramount. This thesis presents an integer-based high performance Field Programmable Gate Array (FPGA) implementation of a back-projection algorithm for orthorectification. A 2.6x speedup is achieved over software processing with an associated 23x reduction in total energy per image.
Keywords
Electrical Engineering, Orthorectification, Field Programmable Gate Array, FPGA, Back-Projection, Size Weight and Power, SWaP, Fixed-point
Rights Statement
Copyright © 2018, author
Recommended Citation
Shaffer, Daniel Alan, "An FPGA Implementation of Large-Scale Image Orthorectification" (2018). Graduate Theses and Dissertations. 6656.
https://ecommons.udayton.edu/graduate_theses/6656
