Date of Award
1998
Degree Name
M.S. in Electrical Engineering
Department
Department of Electrical and Computer Engineering
Keywords
Signal processing Digital techniques, Floating-point arithmetic, C++ (Computer program language), VHDL (Computer hardware description language)
Rights Statement
Copyright © 1998, author
Recommended Citation
Monzon-Vargas, Carlos Orlando, "Implementation of floating point arithmetic in VHDL for a digital signal processor" (1998). Graduate Theses and Dissertations. 4496.
https://ecommons.udayton.edu/graduate_theses/4496